1. Field of the Invention
The present invention concerns photosensitive semiconductor devices and, more precisely, photosensitive linear strips consisting of a row of photodiodes coupled to a charge transfer reading device.
More precisely, the invention concerns the structure of the charge transfer reading device and the means that are associated with this device, to prevent the saturation of the reading device when there is a high degree of illumination of the strips.
FIG. 1 shows a top view of a possible way in which this reading device is constituted, for one of the photodiodes of the strip. FIG. 2 shows a section along the line AA' of FIG. 1.
The photodiode is not shown. Besides, it does not necessarily form part of the same semiconducting substrate as the reading device. It is connected, through an input conductor E, to the cathode CDe of an input diode De of the reading device. The cathode is an N type semiconducting region diffused in the P type semiconducting substrate in which the reading substrate is made.
An input gate Ge, insulated from the substrate by a thin insulating film, covers a P type substrate region 10 which is immediately adjacent to the cathode of the input diode De. This gate is carried to a constant potential Ve and enables the potential of the diode De to be fixed at a value Vo.
A storage gate Gs, also insulated from the substrate, covers a P type substrate region 12 which is immediately adjacent to the region 10. This gate is carried to a fixed potential Vs and enables the storage of the charges coming from the photodiode, as and when they arrive from this diode, because of the exposure of the photodiode to light. The potential of the substrate beneath the gate Gs, where there are no stored charges, is V1.
A passage gate Gp, insulated from the substrate, covers a substrate region 14, immediately adjacent to the region 12. This gate enables the insulation of the charge storage zone (beneath the gate Gs) during the illumination and, periodically, at the end of an illumination measurement period, it is carried to a potential which is high enough to transfer the stored charges to a charge transfer shift register. This register will work during the intervals between these periodic transfers to transmit a item of information on illumination received by the photodiode. The shift register transfers the information while a new illumination period generates new charges beneath the storage gate Gs.
The shift register is depicated schematically by a gate electrode Gccd, controlled by a control phase Occd at the register's own working frequency. This electrode is adjacent to the passage gate Gp.
To avoid problems related to dazzle, namely the generation of excessively high quantities of charges during the illumination measurement period, when the illumination is too intense, there is further provided a charge removal gate Gae on top of a P type substrate region 16 immediately adjacent, on one side, to the storage region 12 and, on the other side, to a charge removal region 18. This region is an N type region (a type opposite to that of the substrate) and is connected to a positive voltage source Vd.
The charge removal gate Gae is used in two ways: firstly, if it is known that the mean illumination during a period will be excessively high (for example, because this has been observed in the preceding period), the charges are prevented from collecting beneath the storage gate for a fraction of the measuring period. For this purpose, the potential barrier generated by the gate Gae and all the charges conveyed through the input E are immediately removed to the region 18. Then the collection of charges is permitted for the rest of the period; the fraction of a period corresponding to the systematic removal of the generated charges is chosen so that, on the whole, there is no risk of saturating the shift register; secondly, outside the charge removal period, during the integration period proper, if the illumination is, all the same, too intense despite and entails a risk of leading to a saturation of the shift register, it is seen to it that the surplus charges are automatically removed to the removal region 18. For this purpose, the potential of the removal gate Gae during the integration period is adjusted to a chosen value which defines the maximum quantity of charges which can be stored beneath the gate Gs. Beyond this value, the charges are shed or discharged into the region 18.
FIGS. 3 and 4, beneath FIG. 2, represents the potentials in the substrate beneath the different gates, firstly (FIG. 3) during the integration period proper (when the gate Gae is at a relatively low potential) and, secondly (FIG. 4) during the fraction of a period when no accumulation is permitted. In a standard way, the potentials have been shown to be increasing in the downward direction, and the accumulation or removal of charges is shown by hatched zones.
FIG. 5 shows, as a reminder, a timing diagram of the operating stages of the device. The gate Gae is carried to a high potential during a charge removal stage with a duration To. Then, during an integration stage, with a duration Ti, the gate Gae is carried to a relatively low potential defining the overflow threshold for the stored charges. At the end of the period or duration Ti, before a new period To, the passage gate Gp is briefly opened for a duration T1 and then shut again.
The approach that has just been described, for the making of charge reading devices with the removal of the overflow of charges and a possibility of setting up an integration period which is variable with the charges conveyed, has two types of drawbacks. The first is the fact that the charge removal region (18) and the gate Gae between this region 18 and the storage region 12 should be placed on a third side of the region 12, a first side being occupied by the input gate Ge while a second side is occupied by the passage gate Gp. If it is sought to make a reading device with many elements side by side, each element corresponding to a respective photodiode, the pitch between adjacent elements will be increased by the presence of the gate Gae and the region 18 on the third side of the gate 12, as well as the connections that convey the control signals to this gate and this region.
The second drawback is the fact that the anti-dazzle effect does not occur during the period T1 when the charges are transferred from the storage gate t the reading shift register. If the period T1 is not negligible as compared with the effective integration period Ti, and if the illumination is very intense during the period T1, a corresponding charge will be introduced into the shift register during the transfer period T1, and this charge could be enough to saturate the register despite the presence of the whole anti-dazzle system.
To overcome the drawbacks of the above-described technique, the present invention proposes a new structure of a charge reading device for linear photosensors comprising an anti-dazzle device.